[tt] [Beowulf] Stroustrup regarding multicore

Eugen Leitl <eugen at leitl.org> on Wed Sep 3 19:38:09 UTC 2008

----- Forwarded message from Lawrence Stewart <larry.stewart at sicortex.com> -----

From: Lawrence Stewart <larry.stewart at sicortex.com>
Date: Wed, 03 Sep 2008 14:42:26 -0400
To: "Lux, James P" <james.p.lux at jpl.nasa.gov>
Cc: "beowulf at beowulf.org" <beowulf at beowulf.org>
Subject: Re: [Beowulf] Stroustrup regarding multicore
User-Agent: Thunderbird 1.5.0.10 (X11/20060911)


   Lux, James P wrote:

   On 9/3/08 10:34 AM, "Peter St. John" <[1]peter.st.john at gmail.com>
   wrote:

     I'm thinking that multicore will make topology interesting again,
     because of the difference between intercore on a common chip vs
     going through a nic to even the fastest fabric.
     Peter

It is probably worth putting numbers on statements like this.  For example, a m
ain memory reference on a fast processor these days is around 80 nanoseconds.
Sending a message to a process on another node
on a fast IB network is getting to 1.2 microseconds.  Communicating
to another thread on the same socket is probably not much faster than
a memory reference since you have to thrash a cache-line or two back and
forth between cores.

The numbers for SiCortex stuff are similar: 80 ns for memory, 1 microsecond for
 MPI nearest-neighbor, 1.3 microseconds for max-diameter.
Core to core via shared memory is about 300 ns, IIRC.

We think of messaging to other nodes as taking a long time, but it isn't
really so.  It is perfectly reasonable to think of programs that
communicate every 1000 flops or so, in the same way we think of 15-50
flops per cache miss as "reasonable".

So I am deeply skeptical of the current furor about how we need new
programming models for "multicore chips".   We have models that work
perfectly well for 100-1000 core clusters, lets use them.

--
-Larry / Sector IX

References

   1. file://localhost/tmp/peter.st.john@gmail.com

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