[tt] IBM demonstrates water-cooling for 3D processors

Brian Atkins <brian at posthuman.com> on Thu Jun 5 21:39:46 UTC 2008

http://arstechnica.com/news.ars/post/20080605-ibm-demonstrates-water-cooling-for-3d-processors.html

Three-dimensional processors took a baby step towards commercial reality today, 
thanks to IBM's water-cooling research. Big Blue and the Fraunhofer Institute 
have successfully tested a multistack CPU prototype that's cooled by pumping 
water directly through the separate layers of the processor. If you aren't used 
to thinking of processors in terms of layers, you may need to check Jon Stokes' 
"Dagwood Sandwich" analogy before continuing on.

3-D chip stacking uses a technology referred to as "through silicon via" (TSV) 
to build processors vertically, rather than just horizontally. By using both 
dimensions, CPU engineers can reduce wire delay, improve CPU efficiency, and 
significantly reduce total power consumption. We've previously covered both 
Intel and IBM's efforts in this area; readers should consult those articles for 
a more comprehensive treatment of the subject.

Thermal dissipation, however, is the Achilles' heel of any three dimensional 
processor. The more layers in a processor, the more difficult it is to 
effectively remove heat emanating from the lower levels. CPU architects can 
compensate for this by placing the hotter parts of a core on upper layers and by 
avoiding designs that stack core hotspots vertically, but the complexity of the 
problem increases with every additional layer. Simply leaving more space between 
the individual layers is not a solution, as this would quickly recreate the wire 
delay problems three-dimensional processors are meant to alleviate.

According to the IBM project lead, conventional processor cooling systems simply 
aren't up to the task. "As we package chips on top of each other to 
significantly speed a processor’s capability to process data, we have found that 
conventional coolers attached to the back of a chip don’t scale. In order to 
exploit the potential of high-performance 3-D chip stacking, we need interlayer 
cooling."

IBM's water-cooled prototype has 100 micron high cooling layers between the die 
layers of the hermetically sealed processor. These layers aren't just filled 
with water, they're also packed with the vertical interconnects between the two 
dies, at a density of 10,000 interconnects per cm2. According to IBM, standard 
fabrication technology was used to build the chip, although specialized 
equipment was needed to connect the wires between the two die packages.

The final results of IBM's test were impressive; the die-stacked processor's 
interlayer cooling solution was capable of removing 180W/cm2 for a stack with a 
footprint of 4cm2. We're still a long way off from three-dimensional processors 
(three-dimensional RAM is imminent) but IBM's prototyped water-cooling solution 
proves that designs could one day see the light of day.
Further reading:

     * IBM: "IBM Cools 3-D Chips with H20"

-- 
Brian Atkins
Singularity Institute for Artificial Intelligence
http://www.singinst.org/

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